<?xml version="1.0" encoding="UTF-8"?>
<feed xmlns="http://www.w3.org/2005/Atom" xmlns:dw="https://www.dreamwidth.org">
  <id>tag:dreamwidth.org,2010-11-06:671752</id>
  <title>Редкие мысли</title>
  <subtitle>Andy Shevchenko</subtitle>
  <author>
    <name>Andy Shevchenko</name>
  </author>
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  <updated>2022-02-04T19:55:06Z</updated>
  <dw:journal username="andy_shev" type="personal"/>
  <entry>
    <id>tag:dreamwidth.org,2010-11-06:671752:152928</id>
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    <title>Not all power supplies are equal</title>
    <published>2022-02-04T19:55:06Z</published>
    <updated>2022-02-04T19:55:06Z</updated>
    <category term="hardware"/>
    <category term="computer"/>
    <category term="quality of service"/>
    <dw:music>ASOT</dw:music>
    <dw:mood>worried</dw:mood>
    <dw:security>public</dw:security>
    <dw:reply-count>0</dw:reply-count>
    <content type="html">I needed to find a power supply (12V 6A or more) with kinda yet another standard connector to power one specific Intel Atom N450 based motherboard. On the photo below there are connectors from four power supplies.&lt;br /&gt;&lt;br /&gt;&lt;a href="https://ic.pics.livejournal.com/andy_shev/1389493/3236/3236_original.jpg"&gt;&lt;img src="https://ic.pics.livejournal.com/andy_shev/1389493/3236/3236_600.jpg" alt="Power supply connectors" title="Power supply connectors"&gt;&lt;/img&gt;&lt;/a&gt;&lt;br /&gt;&lt;br /&gt;Okay, yellow one is not what I was looking for and IBM power supply with it provides 16v, which is a bit more than needed. So, the rest three have the very same connector, BUT...&lt;br /&gt;&lt;br /&gt;(Look at the following pucture very careful till continue with reading)&lt;br /&gt;&lt;br /&gt;&lt;a href="https://ic.pics.livejournal.com/andy_shev/1389493/2938/2938_original.jpg"&gt;&lt;img src="https://ic.pics.livejournal.com/andy_shev/1389493/2938/2938_600.jpg" alt="Power supplies" title="Power supplies"&gt;&lt;/img&gt;&lt;/a&gt;&lt;br /&gt;&lt;br /&gt;...three &lt;b&gt;different&lt;/b&gt; pin layouts! Good that motherboard has all set of protections (wrong polarity) and (one of) the power supply(ies) has a shortcircuit protection. Otherwise I would got working only one out of two: motherboard and power supply.&lt;br /&gt;&lt;br /&gt;P.S. Be careful with this type of connector.&lt;br /&gt;&lt;br /&gt;&lt;img src="https://www.dreamwidth.org/tools/commentcount?user=andy_shev&amp;ditemid=152928" width="30" height="12" alt="comment count unavailable" style="vertical-align: middle;"/&gt; comments</content>
  </entry>
  <entry>
    <id>tag:dreamwidth.org,2010-11-06:671752:152628</id>
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    <title>Turning Minnowboard (v1) to life on vanilla kernel</title>
    <published>2021-12-06T21:59:03Z</published>
    <updated>2021-12-08T13:35:43Z</updated>
    <category term="linux"/>
    <category term="programming"/>
    <category term="howto"/>
    <category term="opensource"/>
    <category term="hardware"/>
    <dw:mood>accomplished</dw:mood>
    <dw:security>public</dw:security>
    <dw:reply-count>0</dw:reply-count>
    <content type="html">&lt;a href="https://www.elinux.org/Minnowboard:Minnow_Original"&gt;Intel Minnowboard (v1)&lt;/a&gt; was one of the first Intel's attempts to create an open hardware (okay, to some extent, if we take all possible blobs into consideration) platform based on Intel CPU or SoC (in this case it's an Intel Atom E600 series with EG20T PCH).&lt;br /&gt;&lt;br /&gt;&lt;img src="https://ic.pics.livejournal.com/andy_shev/1389493/2634/2634_300.jpg" alt="Minnowboard (v1)" title="Minnowboard (v1)"&gt;&lt;br /&gt;&lt;br /&gt;Linus Walleij, who was actively maintaining the GPIO subsystem, once sent a patch to convert PCH UDC (USB Device Controller) driver to use GPIO descriptor interface. However, the original code looks strange and seems never worked. It means that VBUS detection mechanism wasn't supported by the kernel. His patch didn't change that, only improved to use modern data structures and APIs. That time I have promised him that I will check the schematics and test it at some point.&lt;br /&gt;&lt;br /&gt;&lt;b&gt;First part&lt;/b&gt; of the journey appears to be enabling IRQ on GPIO SCH controller, which is not quite usual in a sense of delivery to the OS. The (semi-)wrong assumption that the IRQ is shared with SCI, which is IRQ #9 for x86 case, brought up the wrong change &lt;i&gt;ec689a8a8155 ("mfd: lpc_sch: Add support for Intel Quark X1000")&lt;/i&gt; in the kernel (yeah, sometimes product organizations focused on easier way to get job done, without deeper investigation involved). That change has been partially reverted in &lt;i&gt;922e8ce883e5 ("mfd: lpc_sch: Partially revert "Add support for Intel Quark X1000"")&lt;/i&gt;. Thanks to Jan Kiszka from Siemens for pointing out to the issue and developing initial fix that landed in the kernel with &lt;i&gt;7a81638485c1 ("gpio: sch: Add edge event support")&lt;/i&gt;.&lt;br /&gt;&lt;br /&gt;So, are we done? Nope! &lt;b&gt;The second part&lt;/b&gt; is to fix GPIO in the UDC driver to be in align with the &lt;a href="https://github.com/MinnowBoard-org/design-files/blob/master/minnowboard-v1/rev-a/MinnowBoard_Schematics_002-003195_REVA_CCR.pdf"&gt;schematics&lt;/a&gt;, according to which (see page 4 D5 and page 8 B1-C2) it uses pin 12 (starting from 0, a.k.a. GPIO_SUS7) on that GPIO controller to detect VBUS. Hence the promised change to the driver &lt;i&gt;049d3db625a6 ("usb: gadget: pch_udc: Provide a GPIO line used on Intel Minnowboard (v1)")&lt;/i&gt; and its updated version &lt;i&gt;dfc03e0bae86 ("usb: gadget: pch_udc: Use PCI sub IDs instead of DMI")&lt;/i&gt;.&lt;br /&gt;&lt;br /&gt;Now we done, right? Not really. What about to test? Yes, &lt;b&gt;the third part&lt;/b&gt; is to be sure that it indeed works. The astute reader already asks the question: &lt;i&gt;Why do we need this at all? The board has separate connection for USB host and UDC, it should simply work!&lt;/i&gt;. Unfortunately no.&lt;br /&gt;&lt;br /&gt;There are possibilities regarding to how UDC should behave when the host is connected. One is to power the device (in our case the board itself) by VBUS, in other words to be USB self-powered device. This is not implemented in case of Minnowboard (v1). So another possibility is to detect VBUS to see when we actually got the host connection. But this is broken on... PCB level and hence doesn't work.&lt;br /&gt;&lt;br /&gt;&lt;b&gt;Let's look again at the schematics.&lt;/b&gt; First of all on the page 8 B2-B3 the ~4:7 resistor divider (39 kOhm : 68 kOhm) is depicted. It's needed for the high voltage, which is +5v, to be converted to the chip level, which is +3.3v.&lt;br /&gt;&lt;br /&gt;&lt;img src="https://ic.pics.livejournal.com/andy_shev/1389493/527/527_600.png" alt="VBUS sense" title="VBUS sense"&gt;&lt;br /&gt;&lt;br /&gt;So far so good. However, if we go to the page 19 C4 we will see... bootstrap pull-up 10 kOhm to +3.3v (with above 68 kOhm it gives us ~1:7 divider).&lt;br /&gt;&lt;br /&gt;&lt;img src="https://ic.pics.livejournal.com/andy_shev/1389493/504/504_600.png" alt="GPIO SUS7 bootstrap" title="GPIO SUS7 bootstrap"&gt;&lt;br /&gt;&lt;br /&gt;Okay, let's assume we connected USB device to it which may consume up to 100 mA on the +5v line. By Ohm's law its resistance could be equal to 50 Ohm. In such case we will have 10 kOhm to +3.3v on one leg and 39 kOhm + 68 kOhm (like in parallel due to above "short circuit") on the other. It still gives us ~1:2.5 divider against +3.3v power rail. That's still well higher than the logical "1" threshold.&lt;br /&gt;&lt;br /&gt;Which means that VBUS detection is always high! The bootstrap is dedicated to detect the B1 stepping of the Intel Atom E600 SoC (see page 19 D2-D3). What to do in such case? I don't know the good answer because electrically it's not gonna work. Yes, we may use some timer logic or so to let the BIOS detect that, but I decided just to ignore the bootstrap, so I simply unsoldered R229 from the board. I hope somebody may fix the BIOS to just always assume the B1 stepping if it's not done yet.&lt;br /&gt;&lt;br /&gt;&lt;img src="https://www.dreamwidth.org/tools/commentcount?user=andy_shev&amp;ditemid=152628" width="30" height="12" alt="comment count unavailable" style="vertical-align: middle;"/&gt; comments</content>
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  <entry>
    <id>tag:dreamwidth.org,2010-11-06:671752:152335</id>
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    <title>Dell Venue 7 3740: How to get serial interface</title>
    <published>2021-12-06T19:21:35Z</published>
    <updated>2021-12-08T13:46:16Z</updated>
    <category term="howto"/>
    <category term="hardware"/>
    <category term="intel-mid"/>
    <dw:mood>enthusiastic</dw:mood>
    <dw:security>public</dw:security>
    <dw:reply-count>0</dw:reply-count>
    <content type="html">After experimenting with Intel Edison board I decided to have a look at &lt;a href="https://i.dell.com/sites/csdocuments/Shared-Content_data-Sheets_Documents/en/new-venue-7-spec-sheet.pdf"&gt;Dell Venue 7 3740&lt;/a&gt; which is based on the same chip (but has higher frequency and bigger eMMC, including LTE modem, display, and audio). It can be found on the second hand market for something like 60€ + delivery (as of day of writing this blog post).&lt;br /&gt;&lt;img src="https://ic.pics.livejournal.com/andy_shev/1389493/1085/1085_600.jpg" alt="Dell Venue 7 3740" title="Dell Venue 7 3740"&gt;&lt;br /&gt;Before doing anything useful it would be nice to have an access to the only free serial port (the same as for Intel Edison it's called &lt;i&gt;/dev/ttyMFD2&lt;/i&gt; in the stock kernel). For this, let's open a back cover and look at the motherboard:&lt;br /&gt;&lt;img src="https://ic.pics.livejournal.com/andy_shev/1389493/2168/2168_600.png" alt="Dell Venue 7 3740 motherboard" title="Dell Venue 7 3740 motherboard"&gt;&lt;br /&gt;Our interest here is the 40-pin connector which has last 4 pins related to the UART, but it's good that we may find necessary signals in better, from soldering perspective, locations as depicted below:&lt;br /&gt;&lt;a href="https://ic.pics.livejournal.com/andy_shev/1389493/2445/2445_original.png"&gt;&lt;img src="https://ic.pics.livejournal.com/andy_shev/1389493/2445/2445_600.png" alt="UART pins" title="UART pins"&gt;&lt;/a&gt;&lt;br /&gt;The signals are +1.8v TTL, be aware to find an appropriate adapter. Luckily I have had one which is +1.8v by default and connected directly to it, so +1.8v signal is unconnected in my case, while being soldered &lt;i&gt;just in case&lt;/i&gt;:&lt;br /&gt;&lt;a href="https://ic.pics.livejournal.com/andy_shev/1389493/1859/1859_original.png"&gt;&lt;img src="https://ic.pics.livejournal.com/andy_shev/1389493/1859/1859_300.png" alt="UART connection" title="UART connection"&gt;&lt;/a&gt;&lt;br /&gt;The stock image doesn't issue anything to UART. However, if you rooted the device as pretty well described in &lt;a href="https://opensource.dell.com/releases/Venue_7_3740_Merrifield/developer-edition/Doc/OSS_A195.pdf"&gt;the Dell official documentation&lt;/a&gt;, you would be able to run something like&lt;br /&gt;&lt;pre&gt;
adb shell
dmesg &amp;gt; /dev/ttyMFD2
&lt;/pre&gt;&lt;br /&gt;&lt;br /&gt;(Note that default UART settings are &lt;i&gt;9600,8,n,1&lt;/i&gt;)&lt;br /&gt;&lt;br /&gt;Next step is to build U-Boot for it, stay tuned!&lt;br /&gt;&lt;br /&gt;&lt;img src="https://www.dreamwidth.org/tools/commentcount?user=andy_shev&amp;ditemid=152335" width="30" height="12" alt="comment count unavailable" style="vertical-align: middle;"/&gt; comments</content>
  </entry>
  <entry>
    <id>tag:dreamwidth.org,2010-11-06:671752:152095</id>
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    <title>HTTP-only accessible PDU (Power Delivery Units)</title>
    <published>2021-09-07T13:36:12Z</published>
    <updated>2021-09-07T13:36:12Z</updated>
    <category term="opensource"/>
    <category term="howto"/>
    <category term="hardware"/>
    <dw:music>office noise</dw:music>
    <dw:mood>accomplished</dw:mood>
    <dw:security>public</dw:security>
    <dw:reply-count>0</dw:reply-count>
    <content type="html">In our lab we are using a lot of different DUTs and most of them are connected via PDUs for the remote power cycle. The biggest part of PDUs are APC 7820B or similar (from APC). APC is controllable via SNMP and everything is so far, so good.&lt;br /&gt;&lt;br /&gt;Couple of years ago I have got &lt;a href="https://www.engineeringspecifier.com/electrical-electronic-equipment/kell-systems-launches-envirobot-a-complete-infrastructure-management-and-monitoring-solution-for-its-portable-server-environments"&gt;Keil Systems EnviroBot&lt;/a&gt; PDU (not produced anymore) from e-waste, which is 12 ports and quite an interesting device in a sense that it's accessible via HTTP only.&lt;br /&gt;&lt;br /&gt;After a few hours of experimenting (yeah, I'm not a ninja in HTML/XML + shell) I have nailed it down to make it accessible via our scripts that in their turn are for users logged via SSH.&lt;br /&gt;&lt;br /&gt;So, to show the state of the certain port:&lt;br /&gt;&lt;pre&gt;
curl -s -L --noproxy '*' -o "&lt;b&gt;&amp;lt;FILE&amp;gt;&lt;/b&gt;" "http://&lt;b&gt;&amp;lt;ADDRESS&amp;gt;&lt;/b&gt;/power.cgi?mdu=0"
xmllint --xpath "//tr[td/input[@name=\"switch&lt;b&gt;&amp;lt;PORT&amp;gt;&lt;/b&gt;\"]]/td[3]/text()" --html "&lt;b&gt;&amp;lt;FILE&amp;gt;&lt;/b&gt;" 2&amp;gt;/dev/null
&lt;/pre&gt;&lt;br /&gt;Turning OFF...&lt;br /&gt;&lt;pre&gt;
curl -s -L --noproxy '*' -o /dev/null -d switch&lt;b&gt;&amp;lt;PORT&amp;gt;&lt;/b&gt;="1" -d d12="1" -d B1="Submit" http://&lt;b&gt;&amp;lt;ADDRESS&amp;gt;&lt;/b&gt;/out_control.cgi
&lt;/pre&gt;&lt;br /&gt;...and turning ON:&lt;br /&gt;&lt;pre&gt;
curl -s -L --noproxy '*' -o /dev/null -d switch&lt;b&gt;&amp;lt;PORT&amp;gt;&lt;/b&gt;="1" -d d12="0" -d B1="Submit" http://&lt;b&gt;&amp;lt;ADDRESS&amp;gt;&lt;/b&gt;/out_control.cgi
&lt;/pre&gt;&lt;br /&gt;Couple of weeks ago, due to some changes, we have ordered another &lt;a href="https://intellinetnetwork.eu/products/intellinet-en-19-intelligent-8-port-pdu-163682"&gt;PDU from IntelliNet&lt;/a&gt;, which appears a new device also accessible via HTTP-only.&lt;br /&gt;&lt;br /&gt;For it it looks slightly different.&lt;br /&gt;&lt;br /&gt;State:&lt;br /&gt;&lt;pre&gt;
curl -s -L --noproxy '*' -o "&lt;b&gt;&amp;lt;FILE&amp;gt;&lt;/b&gt;" -u "admin:admin" "http://&lt;b&gt;&amp;lt;ADDRESS&amp;gt;&lt;/b&gt;/status.xml"
xmllint --xpath "//outletStat&lt;b&gt;&amp;lt;PORT&amp;gt;&lt;/b&gt;/text()" "&lt;b&gt;&amp;lt;FILE&amp;gt;&lt;/b&gt;" 2&amp;gt;/dev/null
&lt;/pre&gt;&lt;br /&gt;OFF:&lt;br /&gt;&lt;pre&gt;
curl -s -L --noproxy '*' -o /dev/null -u admin:admin -X POST "http://&lt;b&gt;&amp;lt;ADDRESS&amp;gt;&lt;/b&gt;/control_outlet.htm?op=1&amp;outlet&lt;b&gt;&amp;lt;PORT&amp;gt;&lt;/b&gt;=1&amp;submit=Anwenden"
&lt;/pre&gt;&lt;br /&gt;ON:&lt;br /&gt;&lt;pre&gt;
curl -s -L --noproxy '*' -o /dev/null -u admin:admin -X POST "http://&lt;b&gt;&amp;lt;ADDRESS&amp;gt;&lt;/b&gt;/control_outlet.htm?op=0&amp;outlet&lt;b&gt;&amp;lt;PORT&amp;gt;&lt;/b&gt;=1&amp;submit=Anwenden"
&lt;/pre&gt;&lt;br /&gt;In all cases:&lt;br /&gt;&lt;li&gt;&lt;b&gt;&amp;lt;ADDRESS&amp;gt;:&lt;/b&gt; IP or FQDN address of the PDU&lt;/li&gt;&lt;br /&gt;&lt;li&gt;&lt;b&gt;&amp;lt;PORT&amp;gt;:&lt;/b&gt; power switch port, usually from 0 to 7&lt;/li&gt;&lt;br /&gt;&lt;li&gt;&lt;b&gt;&amp;lt;FILE&amp;gt;:&lt;/b&gt; temporary file to cache the results, so one can get info for all ports on per port basis&lt;/li&gt;&lt;br /&gt;&lt;br /&gt;&lt;img src="https://www.dreamwidth.org/tools/commentcount?user=andy_shev&amp;ditemid=152095" width="30" height="12" alt="comment count unavailable" style="vertical-align: middle;"/&gt; comments</content>
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  <entry>
    <id>tag:dreamwidth.org,2010-11-06:671752:151340</id>
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    <title>It's hard to get an ACPI ID</title>
    <published>2021-04-09T12:53:06Z</published>
    <updated>2021-12-26T11:48:22Z</updated>
    <category term="linux"/>
    <category term="quality of service"/>
    <category term="hardware"/>
    <category term="howto"/>
    <category term="opensource"/>
    <dw:music>ASOT</dw:music>
    <dw:mood>accomplished</dw:mood>
    <dw:security>public</dw:security>
    <dw:reply-count>0</dw:reply-count>
    <content type="html">Historically and due to lack of knowledge about process the ACPI IDs for some devices are abusing the specification. As of today the v6.4 of it &lt;a href="https://uefi.org/sites/default/files/resources/ACPI_Spec_6_4_Jan22.pdf"&gt;[1]&lt;/a&gt; says in the chapter 6.1.5 "_HID (Hardware ID)":&lt;br /&gt;&lt;br /&gt;&lt;p&gt;&lt;i&gt;A valid ACPI ID must be of the form “NNNN####” where N is an uppercase letter or a digit (‘0’-‘9’) and # is a hex digit. This specification reserves the string “ACPI” for use only with devices defined herein. It further reserves all strings representing 4 HEX digits for exclusive use with PCI-assigned Vendor IDs.&lt;/i&gt;&lt;/p&gt;&lt;br /&gt;&lt;br /&gt;&lt;b&gt;Note&lt;/b&gt; that the first part of the ACPI ID is a Vendor ID which has to be in the &lt;a href="https://uefi.org/PNP_ACPI_Registry"&gt;official registry&lt;/a&gt;. &lt;br /&gt;&lt;br /&gt;However, we have a lot of IDs, including some of them issued by Intel, that do not follow that.&lt;br /&gt;&lt;br /&gt;Recently, while I cleaned up kernel from fake IDs &lt;a href="https://lore.kernel.org/linux-rtc/20201116142859.31257-1-andriy.shevchenko@linux.intel.com/"&gt;[2]&lt;/a&gt; that hardware vendors never ever allocated for their devices (many of them simply don't care), it appears that Siemens on behalf of Seiko Epson was trying to establish yet another fake ID for their RTC discrete component in the Coreboot &lt;a href="https://review.coreboot.org/c/coreboot/+/47235"&gt;[3]&lt;/a&gt; and Linux kernel &lt;a href="https://lore.kernel.org/linux-rtc/20201112130734.331094-3-ch@denx.de/"&gt;[4]&lt;/a&gt;.&lt;br /&gt;&lt;br /&gt;Luckily they have listened to me and actually followed the process, i.e. they have asked Seiko Epson to register themselves in ACPI registry &lt;a href="https://www.uefi.org/PNP_ACPI_Registry"&gt;[5]&lt;/a&gt;, which happens couple of month ago under the 'SECC' vendor (while it’s even better, I dunno why they haven't simply reused their PNP Vendor ID which is in the registry for ages). And they have allocated the proper ID, SECC6110, for their RX6110SA component.&lt;br /&gt;&lt;br /&gt;Now the patches for Coreboot (see &lt;a href="https://review.coreboot.org/c/coreboot/+/51176"&gt;[6]&lt;/a&gt;) and Linux kernel, as commit &lt;i&gt;&lt;a href="https://git.kernel.org/torvalds/c/8d69f62fddf6"&gt;8d69f62fddf6&lt;/a&gt; ("rtc: rx6110: add ACPI bindings to I2C")&lt;/i&gt;, are accepted.&lt;br /&gt;&lt;br /&gt;I really wish that all hardware vendors will follow this, including Intel (for the record, we improved a lot the ACPI ID allocation process and there shouldn’t be new cases).&lt;br /&gt;&lt;br /&gt;Funny thing that newly introduced ID for Alibaba abusing the specification due to potential collisions with real PCI IDs ('BABA' can be represented as 0xbaba).&lt;br /&gt;&lt;br /&gt;&lt;img src="https://www.dreamwidth.org/tools/commentcount?user=andy_shev&amp;ditemid=151340" width="30" height="12" alt="comment count unavailable" style="vertical-align: middle;"/&gt; comments</content>
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  <entry>
    <id>tag:dreamwidth.org,2010-11-06:671752:150665</id>
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    <title>Ampire AC162AY or what can go wrong?</title>
    <published>2019-03-11T08:57:41Z</published>
    <updated>2019-03-11T08:59:32Z</updated>
    <category term="howto"/>
    <category term="hardware"/>
    <dw:security>public</dw:security>
    <dw:reply-count>0</dw:reply-count>
    <content type="html">I have spent some time to get the proper pin layout for the 16x2 LCD from Ampire (the model is AC162AY, or 162A-1-D Rev.B). The problem begins with the different polarity of the power rails. I thought if the polarity is wrong, what else can be wrong? That's how I started my search on Internet without any positive results — all of the layouts have a standard power rail polarity, i.e. 1 — GND and 2 — Vcc. At the end it comes I wasted time. Only power rails are messed up, other than that everything seems standard and I got a text on the LCD.&lt;br /&gt;&lt;br /&gt;P.S&amp;gt; Found a PDF with photos of that LCD: &lt;a href="https://fccid.io/W8F800920910/Internal-Photos/Internal-Photos-2-1406623.pdf"&gt;https://fccid.io/W8F800920910/Internal-Photos/Internal-Photos-2-1406623.pdf&lt;/a&gt;&lt;br /&gt;&lt;br /&gt;&lt;img src="https://www.dreamwidth.org/tools/commentcount?user=andy_shev&amp;ditemid=150665" width="30" height="12" alt="comment count unavailable" style="vertical-align: middle;"/&gt; comments</content>
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